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Venice, Florida — Synopsys announced that it has signed a definitive agreement to acquire Synplicity, Inc. for $8.00 cash per Synplicity share. The gross transaction is valued at approximately $227 million, and approximately $188 million net of cash acquired.
Synplicity shares closed at $5.32 so the price offered by Synopsys is just a bit more than a 50% premium over market. Since the market volatility has been high and mostly on the down side, the offering price represents a statement by Synopsys that it considers the acquisition strategic, and may be a preventive strike given the rumors earlier in the week that Cadence was also interested in acquiring the company. The acquisition is expected to close in the second calendar quarter of 2008, subject to regulatory review, Synplicity's shareholder approval, and other customary closing conditions.
Synplicity President and Chief Executive Officer Gary Meyers will join Synopsys as a general manager. Synplicity Co-Founder, Chief Technical Officer, and Vice President Ken McElvain will join Synopsys to help architect the company's systems solutions.
What does it mean?
The acquisition will significantly expand Synopsys' technology portfolio, channel reach and total addressable market when completed. In acquiring Synplicity, Synopsys will enter the FPGA market segment, where Synplicity is the technology leader for FPGA implementation and debug. Synopsys will also enter the fast-growing rapid prototyping
market segment, which the company plans to grow by leveraging its verification technology, large field presence, and virtual prototyping solution for fast software development. The combined solution will help enable electronics companies to better meet tight market windows with proven designs, even as software content continues to grow exponentially. For an example of how Synopsys might leverage the acquisition in the Verification market see System simulation speeds application development.
On the financial side, the reported cost of the acquisition show that Synplicity has only $39 million of cash, not very much for a publicly traded company. As reported in a related story (see Synopsys to pay $227M for Synplicity) Synplicity had a net profit of $13M last fiscal year. That is approximately 7% of the projected net cost of the transaction ($188M), a reasonable return on the investment. Given that Synopsys can leverage the acquisition to increase its profits in the Verification market, the decision by Synopsys seems both prudent and insightful.
Of course this is not the first foray by Synopsys in the FPGA market. All other attempts ended in failure, because the market dynamics in the FPGA space were very different than those in the ASIC market, and because the technical hierarchy within the company continued to insist that DesignCompiler technology was just what the FPGA market needed. But a few things are different this time around.
First of all, large FPGA devices are being used more frequently than in the past not only for prototyping, but also for limited production runs, and to leverage their field programmable characteristics especially in applications that are either software intensive or require a number of tailored versions of the same product.
Secondly, this time Synopsys will have products that are well accepted in the market and that were designed specifically for FPGA users.
Thirdly, this time Synopsys is also acquiring a prototyping product family. I am skeptical that the company will be able to continue a significant presence in the Printed Circuit Board market, a role it is likely to quickly concede to Mentor (already a Synplicity partner in this market), but both the technological and market knowledge possessed by Synplicity can be leveraged to increase the worth of the Virtio acquisition (and vice versa) as well as position Synopsys as a stronger competitor to Mentor in the Verification market. I wonder if Mentor will now re-evaluate the wisdom of joining with Cadence to create the OVM market push. After all, this initiative has been perceived by many, including some Synopsys executives, as a clear effort to marginalize Synopsys in the SystemVerilog market.
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