News
|
Accellera Forms Verification Standards Committee
Accellera announced that its Board of Directors approved the formation of a new verification standards committee.

Synopsys Invests in Formal Proof Company
Synopsys Inc.has announced it has made an investment in Prover Technology AB (Stockholm, Sweden), a supplier of signaling design automation solutions for engineering the safety critical systems that control trains, switches and signals.

NXP, Mentor swap DFT developers, technology
Mentor Graphics is taking on an unspecified number of engineers from NXP Semiconductors' Design for Test operation and establishing an R&D facility in Hamburg , Germany, as part of a deal that also sees the chip maker adopting certain Mentor tools.

ARM job-cutting moves on to tools group
Having embarked on a restructuring of its physical intellectual property division (PIPD), processor licensor ARM Holdings plc (Cambridge, England) is now moving on to restructure its development systems business, according to Warren East, CEO and president.

Commentary: Engineers need an image makeover
Honoring engineers at ESC is great, but it's preaching to the converted. How can engineers win back the public's respect?

The new challenge for tech companies: currency fluctuations
The fluctuating currency market is affecting more than fiscal results; it is also skewing competitiveness and preoccupying corporate boards as top management confronts one more issue over which it has limited control.

Cadence Posts Lower Revenue
Cadence's fiscal results show softening in the EDA market.

Lab-on-chip design automation takes cue from EDA
Design automation tools borrowed from the semiconductor industry are being recast for use with microfluidic labs-on-chip.

TSMC rolls IC simulation offering
At its 2008 Technology Symposium here, Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC) moved to address a bottleneck in chip design: simulation.

ESC panel: Does 'green design' matter?
Does anybody care about "green design"? It may not be a very popular subject in the embedded electronics world.

Future of chip design revealed at ISPD
The International Symposium on Physical Design (ISPD 2008) revealed the current trends in chip design and fabrication--and there were some surprising finds.

Rules need a re-write, say IP experts at forum
The rules of the road in intellectual property need a re-write at the levels of patents, silicon, software and systems, according to speakers at the inaugural Intellectual Property Symposium.

U.S. patent chief: applications up, quality down
The director of the U.S. Patent and Trademark Office said frivolous patent claims are gumming up the system.

ESC keynoters: Soon, all design will be embedded design
With 2008 marking the 20th anniversary of the Embedded Systems Conference, ESC has become an industry "essential." The question is how its role might shift in the next 20 years, as virtually all design--in the view of this year's ESC Silicon Valley speakers--becomes embedded design.

Accelerating development and lowering risk
The goals of the semiconductor industry when using IPwere discussed by a panel of experts at the IP Symposium.

About the EDA DesignLine News Section
About the EDA DesignLine News Section
News/analysis source for engineers tapping EDA tools/techniques for issues such as chip design, SoC architectures, electronic system level (ESL) design, DFM/DFY design, functional/physical verification, FPGA, PLD, analog, and mixed-signal design.
Resource Links
|
|
|
|
CAREER CENTER
|
Ready to take that job and shove it?
|
|
SPONSOR
|
|
|
|
RECENT JOB POSTINGS
|
|
|
For more great jobs, career related news, features and services, please visit EETimes' Career Center.
|
|