Nusym Focuses on Intelligent Verification

Nusym has raised $8 million of capital to date. Nusym's investment funding comes from firms such as Woodside Funds, Draper Richards, L.P., as well as prominent EDA veterans, including Lucio Lanza and John Sanguinetti. The company has engineering facilities in both Los Gatos, California and Bangalore, India. At present it employs 27 engineers.

The Need for Intelligent Verification
The size and complexity of modern Integrated Circuits (ICs) require an extensive verification phase to ensure correct functionality prior to fabrication. In many cases there is no way to ascertain whether a design has been fully verified with 100% confidence, elevating the risk of undiscovered faults, or bugs, in the final product. Incorrect device operation not discovered during this process often results in a fabrication re-spin, driving extensive cost and schedule overruns.

In the 1990's, verification was performed by IC designers who manually tested their code with an understanding of its structure. With the increase in chip size, these manual verification methodologies became unwieldy and the industry transitioned to a more efficient test generation model. Verification approaches such as constrained random verification, which treats the design as a "black box", enabled good coverage relatively quickly. However, achieving coverage closure with a constrained random approach is becoming nearly impossible despite huge time and resource investments due to its open loop nature.

Formal and semi-formal approaches apply a verification style more aware of the design structure, leveraging design internals to improve effectiveness. However, their use on full designs has been impractical due to severe capacity limitations and their inability to leverage current testbench infrastructure.

An ideal, "Intelligent Verification" approach would be able to use existing testbenches, along with the design, and automatically determine how to maximize coverage. At the same time it would be able to direct the user to reasons why certain coverage points were not being detected. Such an approach would avoid the unnecessary random wandering of constrained random test methods to find a bug; instead it would automatically track efficient traces through the design to coverage points. Requiring "white box" analysis of the design and testbench, intelligent verification would also ensure that no simulation cycles are wasted in verifying items that have already been tested.

"With current verification methods, it is possible to get 70-80% coverage but it takes an enormous investment of time and resources to improve beyond that," stated Venktesh Shukla, President and CEO of Nusym. "This problem has been well understood for over a decade but attempts to solve it thus far have fallen short. Nusym is focused on methods to improve coverage automatically."

Nusym will provide intelligent verification solutions that address the following key challenges in electronic design today: increasing verification confidence; tracking hard to reach design areas; and eliminating test redundancy, utilizing an automated, simulation-based method which scales to large designs and requires minimal change in current verification methodologies.

Nusym Management Team
Venktesh Shukla: President and CEO, was senior vice president of marketing and business development at Magma Design Automation Inc prior to joining Nusym. Before joining Magma, Shukla was CEO of Everypath, a leader in enterprise mobile computing. Mr. Shukla also held executive positions at Ambit and Cadence Design Systems. Mr. Shukla helped found the standards organization Open Verilog International (OVI), which has since become Accellera. He holds a Masters in Management from MIT Sloan School of Management and a Bachelors of Electronics from M.A. National Institute of Technology, Bhopal in India.

Dr. Chris Wilson: Founder and CTO, worked at Amdahl, HaL Computers, and Tandem Computers, Andor Systems and Candlestick Networks. Mr. Wilson led hardware development efforts spanning architecture definition to design, verification, and bring up. Chris received a Ph.D. in Electrical Engineering from Stanford University in 2002. He received a MS in EE from Stanford and BS in Computer and Systems Engineering from Rensselaer Polytechnic Institute.

Jayant Nagda: Vice President of Engineering, was group director R&D in VCS group at Synopsys Inc. where he was responsible for verification technologies such as assertions, coverage, test bench automation and formal technologies. Previously Jayant was founder and CEO of CADWorx Consulting Inc, which provided consulting services for chip design, verification and EDA software development. Prior to CADWorx, Mr. Nagda was at Cadence Design Systems, involved with synthesis and simulation. Jayant received a Masters degree in Computer Engineering from Indian Institute of Technology, Delhi and a Bachelor of Engineering degree from Bombay University.

Raghu Srigiriraju: Vice President and Managing Director, Nusym Technology India Pvt Ltd., had been founder and CEO of EDA software services company, Mirafra Technologies. Prior to this, Srigiriraju led major R&D efforts for VCS at Synopsys. Mr. Srigiriraju received a Bachelor's degree in Electrical Engineering from Indian Institute of Technology, Madras and a Masters in Computer Engineering from the University of Massachusetts, Amherst.