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Novas Extends Debug Platform with Faster Performance and SystemVerilog Capabilities





EDA DesignLine

Venice, Florida July 10, 2007 — Novas Software, Inc has announced performance and language improvements to its Verdi Debug system. Performance initiatives are focused on enabling fast, fine-grained access to critical portions of big designs and new incremental, on-demand approaches that accelerate automated analysis and tracing capabilities. Novas is also building on its comprehensive SystemVerilog infrastructure with enhanced SystemVerilog Assertion (SVA) debug solutions and source code debug support for SystemVerilog Testbench (SVTB) descriptions.

Novas has modified the underlying structure of its de facto industry-standard fast signal database (FSDB) to both improve the raw speed of data retrieval and provide more efficient access mechanisms throughout the system. The immediate impact on response times and memory utilization include:

  • An estimated 5X improvement when adding signals to the waveform display;
  • Average 2X " 10X improvement for tracing in source code and schematic views with annotated signal values; and
  • Up to 3X improvement when comparing large FSDB files.
Novas is also enhancing debug productivity with incremental, on-demand creation of specialized databases to support more advanced features. These include module-based behavior analysis performed incrementally at the block-level and a signal-based schematic database for significantly faster visualization and tracing of large flat netlists using less memory. Future enhancements will apply the on-demand model to Novas' knowledge database (KDB) to speed the loading and interactive processing of design data. Further optimization of FSDB data handling techniques is also expected to yield significant additional improvements.

Novas is also evolving its debug platform with new SVA and SVTB capabilities that address the abstract and dynamic nature of these methodologies. Key elements include:

  • SVA - Fast off-line assertion checking; assertion analysis engines to automatically isolate failures; and on-the-fly, post-simulation calculation of assertion data to speed debug and minimize simulation data capture requirements.
  • SVTB - Traditional source code visualization and tracing; advanced browsers for viewing class structure and hierarchy; and new visualization and analysis engines for the capture, display and tracing of dynamic data and class structures.
Initial performance and capacity upgrades and SVA analysis capabilities are immediately available with the latest release of the Verdi Automated Debug System. Enhanced SVA solutions and SVTB source code debug will follow starting in the third quarter of 2007. Advanced SVTB features will be introduced through early 2008. The Verdi debug system is list priced at US$14,000 for a one-year subscription license.

 






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