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Agilent Technologies Released GoldenGate 4.2





EDA DesignLine

Venice, Florida — The release represents an expansion in RFIC simulation coverage for wireless communications products, with transient simulation speed improvements and new mixed-signal simulation capabilities.

In RFIC design, transient (SPICE) simulations provide time-domain results and may be used to provide an initial starting point for frequency-domain simulations. GoldenGate 4.2 features improvements to transient simulations. The faster simulations allow for more extensive use of statistical design throughout the RFIC design cycle, without compromising tight development schedules.

Digital State Sweeping (DSS), is another new feature. It provides an automated solution to the problem of sweeping an RF design through its many digital control states. Performing the sweep manually is a very tedious simulation task. DSS automates operational verification of the control states and provides interface and connectivity testing and digital-RF connectivity debugging, allowing digital and RF teams to work concurrently.

GoldenGate 4.2 also includes additional features for increased simulation coverage, including:

  • The ability to perform transient simulations that include a combination of RF circuits and Verilog-AMS blocks that represent digital or mixed-signal circuitry;
  • New wireless sources from the Agilent Ptolemy simulator, including transmit/receive waveforms for 802.11(WiFi), 802.16 (WiMAX/WiMAN), TDSCMDA, and 3GPPFDD, and custom, user-defined wireless sources, and;
  • Improved Monte Carlo algorithms (Latin Hypercube Sampling and Hammersley Sequence Sampling) for faster Monte Carlo coverage with 5-10x fewer trials.

Agilent's GoldenGate Release 4.2 is available now, with prices starting at approximately $42,000.

 






Agilent Technologies
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