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Venice, Florida — ChipVision Design Systems, just released two products " PowerOptTM and P-SAM " that help companies meet their power budget requirements early in the design cycle. The new tools target companies developing mobile communications, networking, consumer or automotive applications that need extended battery life or reduced cooling requirements.
PowerOpt, a patented Electronic System Level (ESL) power optimization design tool lets RTL and system designers work interactively with system-level descriptions written in ANSI-C, SystemC and C++, exploring and visualizing critical tradeoffs in timing, area and power. It then implements their choices to generate power-optimized Register Transfer Level (RTL) code with up to three times lower power consumption than RTL flows, due to code compactness at the system-level compared to RTL.
PowerOpt performs synthesis, analysis and estimation, and generates RTL code automatically, bridging the gap from specification at the system level to implementation at the RT level. Once the source code is imported, PowerOpt generates the pre-implementation activity profile needed for dynamic power analysis. Next, users interactively control power (dynamic and leakage), area, and timing trade-offs to achieve optimized synthesizable Verilog code the RTL design team can modify according to its requirements. PowerOpt outputs constraints in Common Power Format (CPF) and Unified Power Format (UPF). It also uses technology-driven modeling for process, temperature, and voltage variations.
ChipVision's new P-SAM framework " short for Power Simulation, Analysis and Modeling " lets system architects investigate design alternatives at the system level, quickly devise effective power management strategies, and verify whether power targets are met. It also lets software developers analyze the impact of source code changes on expected power consumption in their choice of virtual platform simulation environment without relying on time-consuming lower-level architectural analysis techniques or emulator runs.
The P-SAM analysis framework offers system-level designers and software developers a standards-based API for source code instrumentation, and comprehensive analysis tools for design descriptions in SystemC or pure C/C++. It enables early system-level power analysis based on system-level simulation; system architectural trade-off analyses such as IP selection and partitioning are performed quickly and accurately, and real application software is run on the system. Developers gain dynamic visibility into the power consumed across the peripherals, interconnect, processor and memory of a virtual SoC platform. Working interactively, they perform architectural, software and power tradeoff analysis at a level not typically possible with other approaches. They are able to investigate different bus topologies, compare power consumption of IP blocks, identify hotspots, and explore other system areas to hone their power management strategies and verify these are met. P-SAM also can be integrated into commercially available virtual platforms.
Both PowerOpt and P-SAM are available now, with PowerOpt priced at USD $450,000 for a three-year, time-based license. P-SAM pricing varies depending on the structure of the SOC. ChipVision will demonstrate both products at the Design Automation Conference (DAC), June 8-13, 2008, in Anaheim, Calif.
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