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Imperas announces agreement with MIPS Technologies





EDA DesignLine

Venice, Florida — Imperas announced it has signed an agreement with MIPS Technologies, Inc. for the verification of a series of processor models that Imperas will create and make freely available. Imperas models of MIPS processor cores will be verified by MIPS Technologies under the MIPS-Verified program, and will be available for free at the OVP website. These verified MIPS models can be used to build virtual platforms that run up to 500-million instructions per second and can be used for efficient development of higher quality embedded software.

The goal of OVP is to provide the infrastructure technology - open source and free, focused on multicore and speed - for embedded software development, and the infrastructure through the OVPworld.org website for this community to grow. The technology helps to address problems embedded software developers have when modeling the system on chip (SoC) that hosts their software. The OVP website serves as the portal, with details about the technology, a discussion forum for the community, and links to download each component.

The MIPS core models and many other models used in developing virtual platforms are available now and downloadable free of charge at the OVP website. Other components available from OVP include application programming interfaces (APIs) for building a platform verification infrastructure and developing behavioral and processor models. Model libraries of processors, behavioral components and peripherals are offered, along with platform templates, bare-metal platforms, and OVPsim, a reference simulator shipped as an executable.

 






Imperas
MIPS Technologies
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