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Xilinx shipping ISE Design Suite 11.1



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Courtesy of Programmable Logic DesignLine

SAN FRANCISCO—Programmable logic vendor Xilinx Inc. is now shipping ISE Design Suite 11.1, described as the first FPGA design tool set with interoperable domain-specific design flows and tool configurations for logic, digital signal processing (DSP), embedded processing and system-level design.

According to representatives from Xilinx, the release of ISE 11.1 marks a milestone in the delivery of targeted design platforms, a strategy that the company articulated in February when it launched the next generations of its high-end Virtex and low-cost Spartan FPGAs.

"It is a focus for us to build a base foundation that others can build upon much more easily than we've done in the past," said Mark Goosman, Xilinx senior product marketing manager.

ISE 11.1 is available in four domain-specific design configurations: the Logic Edition, DSP Edition, Embedded Edition, and System Edition. Each edition provides an FPGA design flow tailored for the user profile and domain-specific methodology and design environment requirements, according to Xilinx (San Jose, Calif.).

Echoing what Xilinx executives said about targeted design platforms at the product introduction event in February, Tom Feist, senior marketing director for ISE Design Suite, said the domain-specific editions would enable designers to focus their efforts on creating value-added, differentiated product applications.

"They can start with a domain-specific system, add their secret sauce, and get to market quickly," Feist said.

Xilinx said in February that its targeted design platforms would be supported by IP cores, design environments, reference designs and scalable boards and kits offered by Xilinx and third-party partners.

Version 11.1 of ISE incorporates new features and ease-of-use enhancements to the base-level FPGA and domain-specific tools, technologies and intellectual property IP components delivered with Xilinx targeted design platforms, the company said. ISE 11.1 shrinks development cycles up to 50 percent, reduces dynamic power consumption by 10 percent on average, and boosts tool performance by 2X for current generation Virtex-5 and Spartan-3 FPGA-based designs and enables early access customers to start designing with targeted design platforms based on the latest Virtex-6 and Spartan-6 devices, according to the company.

Each ISE Design Suite 11.1 edition provides a front-to-back design environment built on Xilinx technologies for design entry, synthesis, implementation and verification with integration to third-party synthesis and simulation tools, Xilinx said.



Page 2: Editions breakdown  

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