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STMicroelectronics' design kit has memory BIST/repair





EDA DesignLine

STMicroelectronics has released Atrenta's SpyGlass-MBIST (memory built-in self test) insertion solution as part of its front-end design kit. This kit is accessible to all ST design teams worldwide as well as ST's ASIC customers.

The SpyGlass-MBIST solution is an RTL memory BIST insertion tool that allows replacement of the original memories in a design with the BIST system at the register transfer level as well as insertion of the repair solution.

The SpyGlass-MBIST flow allows the user to define design-specific information or change the tool's default values. The MBIST insertion can be run at both the gate and the RTL levels.

SpyGlass-DFT rules can also be run at RTL including the MBIST logic for achieving high (>99percent) testability early in the design stage.

"This automatic solution becomes necessary in devices having huge proliferation of memory instances, as our applications require improving efficiency/lead time in our DFT design flow," said Angelo Oldani, design director for the Communication Infrastructure Division, STMicroelectronics, in a statement.

Atrenta's SpyGlass-MBIST solution is the result of a strategic collaboration initiative between Atrenta and STMicroelectronics for automating the insertion of ST's proprietary memory test and repair in advanced technology nodes at 65nm, 45nm and 32nm.

The SpyGlass-MBIST product is available now, and the U.S. list price starts at $90,000 for a one-year time based license.



 






Atrenta
STMicroelectronics
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