A trip to last month's PCB Design Conference East has reinforced a long-standing opinion of mine regarding the printed-circuit-board (PCB) design-tool industry—it's not very dynamic. Progress in board-design tools seems to be, well, slow and steady, concentrating in just a few areas.
Discussing board-level EDA products with several vendors at the show revealed enhancements in the following design areas:
- Better and faster routing, including improved handling of complex, high-pin-count packages
- Improved ties to board manufacturing (DFM—design for manufacturing)
- Superior performance (speed and signal integrity) of the routed board
- Overall improvements in board-design productivity.
These are all laudable objectives, but EDA vendors of board-design tools are missing the boat. Board design remains a fairly isolated operation from chip design, and that's a problem.
Chip-based PCB systems need to integrate the design activities of multiple levels of design activity—chip, package, and board. A vertically integrated design environment would be extremely valuable in achieving full design closure, in other words, meeting all design specifications in board-based systems. Two of PCB design tools' "Big Three", Mentor Graphics and Cadence Design Systems (Zuken being the third), have extensive EDA products for both chip and board design. However, neither company has, up to now, made significant inroads into an integrated chip/board design-tool suite.
I don't want to imply that the current progress of board-level EDA tool vendors is not valuable. For example, Zuken's upgrade to the company's PCB design-tool suite, CADSTAR 6, features several nice features—a constraint manager to help in high-speed board design, faster drawing tools, better routing, interactive parts placement, and a library-management tool. The constraint manager, usually found in more expensive board-design tools, is particularly important since it lets a designer set constraints early in the design, with the constraints maintained throughout the design flow.
Mentor Graphics announced several enhancements to its board-design tools. The first, the CAM Output Manager, is an automated DFM tool for generating and distributing CAM data for complex PCB manufacturing. The Manager is an addition to Mentor's Expedition Series design flow. More significant (and the most innovative announcement I heard at the show) is the addition of VHDL-AMS support to Mentor's ICX signal-integrity tool for the company's Expedition and Board Station PCB design-tool suites. ICX now supports models in IBIS, three versions of Spice (Eldo, Hspice, and Berkeley Spice), and VHDL-AMS, a mixed-signal hardware-description language. Since VHDL-AMS is used extensively for chip design, the inclusion of support for this language may indicate the first step towards a Mentor integrated chip/board design environment.
Along with multi-design-level integration, PCB design-tool vendors also need to put more effort into board test. Chip design-tool vendors, faced with increasing test time and cost along with obsolescence of expensive in-place automatic test equipment (ATE), have forged relationships with many of the test industry's leading ATE manufacturers to more closely connect chip design-for-test (DFT) and ATE operations. Board EDA vendors need to build similar relationships with ATE companies, since board complexity and speeds, like those of chips, are increasing rapidly.
PCB design-tool vendors need to do more than design new tools or enhance existing ones to achieve incremental improvement in board performance or designer productivity. We need tools that will handle board-level GHz clock and data rates, component pin-counts over 1000, and ever-shrinking design cycles. In other words, we need board-tool vendors that think "beyond the board", both down to the chip and up to the box levels.
